The present invention relates to the power detection of a RF signal. Particularly, the present invention relates to a circuitry for detecting the power of the RF signal comprising a FET transistor which is connected in parallel to two inputs for supplying the RF signal and two outputs for detecting the power of the RF signal.
It is well known to use a biased Schottky diode for power measurements in RF technologies. Due to its nonlinear current voltage characteristic the diode causes a deformation of the RF signal. Furthermore thermistors are used in RF power measurements, but they are suitable only for high RF power signals due to their low sensitivity.
Field effect transistors (FETs) present also a nonlinear current voltage I-V characteristic. Therefore they are also suitable as RF power detector. The FET transistor shows a better sensitivity than the biased Schottky diode and the output voltage is directly available. A power detector comprising a FET transistor is less sensitive to temperature variations than a power detector based on a Schottky diode. Also the effective noise voltage of the diode detector, 600 nV, is four times as high as the noise level of a detector comprising a FET transistor. All these advantages make the FET detector more and more important in the RF power measurements.
As mentioned above, the basic detector concept relies on a deformation of the RF signal with a nonlinear element. Therefore the RF signal will be decomposed in a DC signal component and a number of harmonics:
I=Idc+Fundamental+Harmonics
The DC current is a function of the RF signal amplitude. The output voltage Vout is proportional to the RF power signal at low power levels thanks to the nonlinear I-V characteristic.
In M. Ratni, B. Huyart, E. Bergeault, L. P. Jallet. xe2x80x9cRF Power Detector using a silicon MOSFETxe2x80x9d IEEE MTT-S Digest Baltimore Md. 1998, a structure for such a RF power detector is proposed.
The design of such a RF power detector structure according to the above state of the art is shown in FIG. 13. T2 is a Silicon MOS transistor biased through an RC cell at Vgs=0.6V. The transistor is parallel to the RF power line feed. A high pass filter capacitor C1 (60 pF) is responsible for the isolation from the generator VRF. Between the transistor and the output circuit RLoad (10kxcexa9) and C3 (10 pF) should be placed theoretically a low pass filter but, due to technology constraints, this filter has been replaced by a resistance R1 (1kxcexa9) whose value is greater than the drain-source resistor. The RF signal will then flow through the transistor. Its DC current is collected at the load resistance RLoad, capacitor C3 is used as a shunt element for the remaining harmonics of the RF signal.
As it can be seen, the structure of this power detector is asymmetrical. Therefore it cannot be operated in a differential mode, which is a drawback of this structure.
The object of the present invention is therefore to propose a technique for detecting the power of a RF signal with a circuitry using a FET transistor and a method for detecting the power of a RF signal, which technique is compatible with a differential operating mode.
The above object is achieved by means of a circuitry for detecting the power of a RF signal comprising a FET transistor connected in parallel to two inputs for supplying a RF signal and two outputs for detecting the power of the RF signal, wherein a resistor having a resistance larger than the drain-source resistance of the FET transistor is connected between one of the output and the source of the FET transistor.
A capacitor is connected between one of the input and the source of the FET transistor.
The gate of the FET transistor is connected to ground.
Further the gate of the FET transistor is self biased respectively externally biased.
The above object is further achieved by means of a method for detecting the power of a RF signal by a circuitry comprising a FET transistor connected in parallel to two inputs for supplying a RF signal and two outputs for detecting the power of the RF signal, wherein the circuitry is supplied differentially with a RF signal to a RF input, respectively supplied with a RF signal at a single RF input.
According to further aspects of the invention an I/Q demodulator device, a (m)_PSK (phase shift keying) demodulator and a (m)_QAM (quadrature amplitude modulation) demodulator are proposed (wherein m is an integer).
According to the invention furthermore a five-port I/Q demodulator is provided using three circuitries as set forth above wherein one of the circuitry is supplied differentially with the RF signal to a RF input and two of the circuitries are supplied with a RF signal at a single RF input.
At last one n-Port I/Q demodulator using a number of nxe2x88x922 as set forth above is provided wherein all of the circuitries are supplied with a RF signal at a single RF input.